1. Field of the Invention
The present invention relates to a lattice matching device and a method for fabricating the same and more particularly to a lattice matching device such as a superconducting thin film grain boundary junction device, a superconducting thin film vertical junction device, or a superconducting thin film interlaminer or interlayer wiring in a three dimensional integrated circuit and a method for fabricating such device.
2. Description of the Prior Art
La.sub.2-x M.sub.x CuO.sub.4-y (M: Sr, Ba, 0&lt;x&lt;1) discovered in 1986 has a superconductivity transition temperature (T.sub.c) of 30-40K which is much higher than the T.sub.c of conventional metal superconductors and, hence, extensive research on oxide superconductors has been conducted. As a result, LnBa.sub.2 Cu.sub.3 O.sub.x (Ln: Y or lanthanides; 6&lt;x&lt;7) oxide superconductors having a T.sub.c of about 90K, BiSrCaCuO.sub.x oxide superconductors having a T.sub.c of about 110K, and TlBaCaCuO.sub.x oxide superconductors having a T.sub.c of about 120K have been discovered one after another.
Various junction devices have been reported which utilize, among these high temperature superconductors, YBa.sub.2 Cu.sub.3 O.sub.x. These junction devices are classified into two groups; one is a group of vertical junction devices and the other is a group of lateral junction devices.
The lateral junction devices include (1) a junction using a so-called bicrystal substrate which has two substrate regions adjacent each other differing in the direction of their crystal axis from each other, and (2) a 45.degree.-inclined junction having a first thin film formed on SrTiO.sub.3 and a second thin film formed on MgO in which the first and second thin films have different intraplanar directions from each other.
Next, an explanation will be made of the junction using a bicrystal substrate. FIG. 1A is a planar view showing a thin film, and FIG. 1B is a cross sectional view showing the thin film shown in FIG. 1A. In FIGS. 1A and 1B, reference numerals 31, 31' are SrTiO.sub.3 substrates, respectively. The SrTiO.sub.3 substrates 31 and 31' have a crystal axes with different directions Reference numeral 38 designates a junction portion at which the SrTiO.sub.3 substrates 31 and 31' differing in the direction of crystal axis one from another, are adjacent to each other. Reference numerals 33 and 33' are YBa.sub.2 Cu.sub.3 O.sub.x thin films, respectively, formed on the bicrystal substrate. Arrows c indicate the direction of the c-axes of the thin films 33, 33' and arrows a/b indicate the directions of the a- or b-axes of the thin films 33 and 33'. Reference numeral 35 designates an inclined grain boundary junction.
With this junction, CuO.sub.2 planes (a- or b-planes), in which electric current flows, exist in the same plane in both electrodes that sandwich the junction and contact each other in a parallel relation. With this arrangement, the leak current increases.
Next, an explanation will be made of the 45.degree.-inclined junction referring to FIGS. 2A and 2B. FIG. 2A is a planar view showing a conventional thin film, and FIG. 2B is a cross sectional view showing the thin film shown in FIG. 2A. In FIG. 2B, reference numeral 41 designates a sapphire substrate, 42 is a MgO thin film formed on a part of a surface of the sapphire substrate 41, 43 is a SrTiO.sub.3 thin film located over the MgO thin film 42 and the remaining part of the surface of the sapphire substrate 41, and 44 and 44' are c-axis oriented YBa.sub.2 Cu.sub.3 O.sub.x thin films, respectively, formed on the SrTiO.sub.3 thin film 43. Reference numeral 45 designates a grain boundary junction formed between the thin films 44 and 44'. Arrows c indicate the direction of the c-axes of the YBa.sub.2 Cu.sub.3 O.sub.x thin films 44 and 44', and arrows a/b indicate the direction of a- or b-axes of the YBa.sub.2 Cu.sub.3 O.sub.x thin films 44 and 44', respectively.
As will be understood from FIGS. 2A and 2B, the axes of preferential orientation of the electrodes sandwiching the grain boundary junction 45 are the same as the c-axis while the YBa.sub.2 Cu.sub.3 O.sub.x thin films 44 and 44' form a 45.degree.-inclined junction. In this case, too, CuO.sub.2 planes (a- or b-planes), in which electric current flows, exist in the same plane in both electrodes sandwiching the junction and contact each other in a parallel relation, as in the case of the bicrystal. As a result, the CuO.sub.2 planes in the YBa.sub.2 Cu.sub.3 O.sub.x, in which electric current flows, always exist in the planes of the YBa.sub.2 Cu.sub.3 O.sub.x thin films 44 and 44', and the CuO.sub.2 planes contact each other always in parallel (a/b-axis direction vs. a/b-axis direction) in a boundary region of the junction and in both electrode portions. This arrangement causes a serious problem of an increase in the leak current.
In the case of vertical junctions, the use of a c-axis oriented film, in which superconducting current flows more easily in a thin film plane, as an electrode gives rise to a junction portion having a smaller coherence length in the c-axis direction, causes a problem in that no superconducting current can flow through the fabricated junction. On the other hand, when there is used an a-axis oriented thin film that has a larger coherence length in the direction of the junction plane and in which superconducting current flows more easily, it is difficult for current to flow in the plane of the thin film, resulting in a decreased current density. Therefore, thicker wiring is required, which makes it difficult to reduce the size of the device.
Further, superconducting current flows in a c-axis oriented portion having a small coherence length at a critical current density by several digits smaller than an a-axis oriented portion having a large coherence length. Hence, in a highly integrated three dimensional circuit having a pair of adjacent c-axis oriented thin films, superconducting current must flow through a c-axis oriented portion having a small coherence length at the time of transmission and receipt of signals from a lower circuit layer to an upper circuit layer. The a-axis oriented portion having a small coherence length serves as an interlayer wiring region. In this interlayer wiring region, the cross section must be large so that the density of the signal current does not exceed a critical current density. This makes it difficult to achieve the high integration of circuits.